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| Detailed information |
| Original study plan |
Master's programme Electronics and Information Technology 2025W |
| Learning Outcomes |
Competences |
| Based on existing HDL knowledge, students can design, simulate and synthesize complex digital hardware in a self-responsible and independent manner, and finally realize it as a full-custom IC.
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| Skills |
Knowledge |
- Design complex digital hardware using important modelling guidelines for ASIC design and thus optimize the synthesis result (K6)
- Verify the design through pre-synthesis, post-synthesis and post-layout simulations (K3)
- Synthesize and implement the design as a full-custom IC and check the timing data (K5)
- Describe the digital hardware in the design to ensure complete and efficient testing after the physical implementation (K3)
- Implement a 32-bit RISC processor core as a full-custom IC and verify it with simulations (K5)
- Planning and implementation of the floorplans, pinouts and padframes (K6)
- Write a documentation for the implementation and the test of the design (K3)
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- Modelling guidelines in ASIC design
- Synthesis libraries
- Timing libraries
- Design for test
- Digital design flow including open-source tools (Verilator, Icarus Verilog, GHDL, cocotb, GTKWave, Surfer, Yosys, OpenROAD, and LibreLane)
- Introduction to the basics of the design and realization of a 32-bit RISC processor core as a full-custom IC
- Simulation of the entire system, including timing data
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| Criteria for evaluation |
Grading of the project, exam at the end of the semester (oral or written).
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| Methods |
Introduction to the topic using a slide presentation, homework, and laboratory appointments to complete the project. Group work is not planned.
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| Language |
English |
| Study material |
Lecture notes will be available for download.
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| Changing subject? |
No |
| Further information |
Basic knowledge of an HDL (VHDL, Verilog, or SystemVerilog) and hardware design is required.
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| Corresponding lecture |
(*)INMAWKVVLSI: KV VLSI-Entwurf (3 ECTS)
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| Earlier variants |
They also cover the requirements of the curriculum (from - to)
921CGELVLDK13: KV VLSI Design (2013W-2022S)
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