Inhalt

[ 489WSSIADSV22 ] VL Signal Processing Architectures

Versionsauswahl
Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M1 - Master's programme 1. year (*)Informationselektronik Michael Lunglmayr 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology 2025W
Learning Outcomes
Competences
Students are familiar with efficient signal processing architectures and techniques for efficient implementation in digital hardware.
Skills Knowledge
  • Ability to select efficient signal processing architectures for a given problem (k2, k4, k5)
  • Ability to optimize signal processing architectures for fixed-point implementation (k3, k6)
  • Ability to apply countermeasures for undesirable effects in fixed-point implementation (k2,k6)
  • Algorithms and Fundamentals of Signal Processing
  • DSP Arithmetic
  • DSP Hardware: DSPs, FPGAs, and ASICs
  • CORDIC Algorithm: Theory, Architectures, and Applications
  • Quantization Effects in Digital Filters
  • Low-Cost Digital Filters
  • Multirate Signal Processing
  • Sigma-Delta Modulation and Oversampling ADCs
  • Digital Signal Generators
Criteria for evaluation Oral exam
Methods Theory presented by lecturer, Matlab based presentations
lecture videos (screen and audio recording)
Language German
Study material
  • Lecture Slides
  • P. Pirsch, Architekturen der digitalen Signalverarbeitung, B.G. Teubner Stuttgart, 1996.
  • U. Meyer-Baese, Digital Signal Processing with Field Programmable Gate Arrays, Springer Verlag, Berlin Heidelberg, 2007
Changing subject? No
Further information Language can be switched to English if requested
Earlier variants They also cover the requirements of the curriculum (from - to)
489WSIVADSV14: VL Signal Processing Architectures (2014W-2022S)
On-site course
Maximum number of participants -
Assignment procedure Assignment according to sequence