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[ 489WSESMSTV22 ] VL Modelling, simulation and test of integrated circuits
Versionsauswahl
(*) Unfortunately this information is not available in english.
Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M2 - Master's programme 2. year (*)Informationselektronik Timm Ostermann 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology 2025W
Learning Outcomes
Competences
Students know the in-depth basics of modeling, simulation and testing of integrated circuits.
Skills Knowledge
  • Modeling of ICs (k1-k6)
  • Simulation of ICs (k1-k6)
  • Testing ICs (k1-k6)
  • Model concepts
  • Model structure
  • Validity
  • Simulation
  • Test Basics
  • Scan Path Design
  • BIST
  • BSI
  • Analog/RF Test
Criteria for evaluation written and/or oral exam
Methods Discussion of slides
Language German
Study material Study material is available for download.
Changing subject? No
Corresponding lecture (*)489WSATTISV16: VO Test Integrierter Schaltungen (3 ECTS) oder 489WSATMSSV16: VO Modellierung und Simulation von elektronischen Schaltungen (3 ECTS)
On-site course
Maximum number of participants -
Assignment procedure Assignment according to sequence