- Know and practically apply VHDL language constructs (k1,k3)
- Write synthesizable VHDL code, simulate it, and synthesize it for FPGAs (k3)
- Perform data path/controller partitioning for hardware designs (k3,k4,k6)
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- VHDL Language Constructs: Entity, Architecture, Process, Concurrent Statements, Register Processes
- VHDL Simulation, Testbench Design, Test Design
- Characteristics of Synthesizable VHDL Code
- Time Measurement in Digital Hardware
- Generic Design Structure
- Data Path/Controller
- Partitioning/Assembly of Entities
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