Studienhandbuch | VL Design of Integrated A/D-Converter

Inhalt

Workload	Education level	Study areas	Responsible person	Hours per week	Coordinating university
3 ECTS	M - Master's programme	^(*)Informationselektronik	Timm Ostermann	2 hpw	Johannes Kepler University Linz

Detailed information
Original study plan	Master's programme Electronics and Information Technology (ELIT) 2023W
Objectives	Design of integrated sigma-delta ADCs
Subject	system design different topologies stability discrete time/continuous time building block specification circuit design
Criteria for evaluation	exam at the end of the lecture
Language	German
Changing subject?	No
Earlier variants	They also cover the requirements of the curriculum (from - to) MEMWEVOEIAD: VO Design of Integrated A/D-Converter (2004S-2022S)

On-site course
Maximum number of participants	-
Assignment procedure	Assignment according to sequence