[ 489ETELEKSV22 ] VL Design of complex integrated circuits

Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M1 - Master's programme 1. year (*)Informationselektronik Harald Pretl 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology (ELIT) 2023W
Objectives This course offers a broad introduction into the design of integrated circuits (IC).
  • History of integrated circuits, repetition MOS-FET
  • IC technology
  • Scaling & Economy
  • IC Layout
  • Design Methodology & Auxiliary Circuits
  • IC Packaging & PCB Design
  • ESD, Latchup & IO
  • Biasing & References
  • Power Supply & Decoupling
  • Crosstalk & Isolation
  • Testing & Debug
  • Circuit Simulation
  • Datasheet
Criteria for evaluation Written exam
Methods Presentation and discussion of the theory in the lecture (VL, weekly), hands-on usage of the theory in the practices (UE, blocked).
Language German and English
Study material
  • B. Razavi: Fundamentals of Microelectronics
  • P. Allen/D. Holberg: CMOS Analog Circuit Design
  • Ch. Hu: Modern Semiconductor Devices for Integrated Circuits
  • Y. Tsividis/C. McAndrew: MOS Transistor
  • N. Weste/Harris: CMOS VLSI Design – A Circuits and Systems Perspective
  • J. Rabaey/A. Chandrakasan/B. Nikolic: Digital Integrated Circuits
Changing subject? No
Earlier variants They also cover the requirements of the curriculum (from - to)
489ELTEEKSV17: VL Design of complex integrated circuits (2017W-2022S)
489ETITEKSV16: VL Design of complex integrated circuits (2016W-2017S)
IEMPAVOEKIS: VL Design of complex integrated circuits (2011W-2016S)
On-site course
Maximum number of participants -
Assignment procedure Direct assignment