[ 489WSESEIUV22 ] VL Design of Integrated A/D-Converter

Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M - Master's programme (*)Informationselektronik Timm Ostermann 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology 2021W
Objectives Design of integrated sigma-delta ADCs
  • system design
  • different topologies
  • stability
  • discrete time/continuous time
  • building block specification
  • circuit design
Criteria for evaluation exam at the end of the lecture
Language German
Changing subject? No
Further information Until term 2022S known as: MEMWEVOEIAD VO Design of Integrated A/D-Converter
On-site course
Maximum number of participants -
Assignment procedure Assignment according to sequence