[ 489WSATTISV16 ] VL Testing of integrated circuit
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| Workload |
Education level |
Study areas |
Responsible person |
Hours per week |
Coordinating university |
| 3 ECTS |
M2 - Master's programme 2. year |
(*)Informationselektronik |
Timm Ostermann |
2 hpw |
Johannes Kepler University Linz |
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| Detailed information |
| Original study plan |
Master's programme Electronics and Information Technology 2020W |
| Objectives |
The lecture provides an overview in test of integrated circuits.
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| Subject |
- Basics
- Scan Path Design
- BIST
- BSI
- Analog/RF Test
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| Criteria for evaluation |
written and/or oral exam
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| Methods |
Slide presentation
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| Language |
German |
| Study material |
Will be announced in the lecture
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| Changing subject? |
No |
| Earlier variants |
They also cover the requirements of the curriculum (from - to)
IEMWCVOTINS: VO Testing of integrated circuit (2012S-2016S)
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| On-site course |
| Maximum number of participants |
- |
| Assignment procedure |
Direct assignment |
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