[ 489WSATTISV16 ] VL Testing of integrated circuit

Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M2 - Master's programme 2. year (*)Informationselektronik Timm Ostermann 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology 2020W
Objectives The lecture provides an overview in test of integrated circuits.
  • Basics
  • Scan Path Design
  • BIST
  • BSI
  • Analog/RF Test
Criteria for evaluation written and/or oral exam
Methods Slide presentation
Language German
Study material Will be announced in the lecture
Changing subject? No
On-site course
Maximum number of participants -
Assignment procedure Direct assignment