Studienhandbuch | VL Testing of integrated circuit

Inhalt

Workload	Education level	Study areas	Responsible person	Hours per week	Coordinating university
3 ECTS	M2 - Master's programme 2. year	^(*)Informationselektronik	Timm Ostermann	2 hpw	Johannes Kepler University Linz

Detailed information
Original study plan	Master's programme Electronics and Information Technology 2020W
Objectives	The lecture provides an overview in test of integrated circuits.
Subject	Basics Scan Path Design BIST BSI Analog/RF Test
Criteria for evaluation	written and/or oral exam
Methods	Slide presentation
Language	German
Study material	Will be announced in the lecture
Changing subject?	No
Earlier variants	They also cover the requirements of the curriculum (from - to) IEMWCVOTINS: VO Testing of integrated circuit (2012S-2016S)

On-site course
Maximum number of participants	-
Assignment procedure	Direct assignment