[ 521HARDRARCV16 ] VL Rechnerarchitektur
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| Es ist eine neuere Version 2021W dieser LV im Curriculum Bachelorstudium Elektronik und Informationstechnik 2024W vorhanden. |
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| Workload |
Ausbildungslevel |
Studienfachbereich |
VerantwortlicheR |
Semesterstunden |
Anbietende Uni |
| 4,5 ECTS |
B2 - Bachelor 2. Jahr |
Informatik |
Robert Wille |
3 SSt |
Johannes Kepler Universität Linz |
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| Detailinformationen |
| Quellcurriculum |
Bachelorstudium Informatik 2021S |
| Ziele |
Students understand how software is described in a fashion that can be realized in terms of logic circuits. They are enabled to realize corresponding components in a hardware description languages. They are able to run simple software/assembly code on their own implementation of a processor. They are able to optimize their processor through sequential control units, pipelining, co-processors, etc. They are able to evaluate the performances of the resulting processors. The are enabled to improve the memory usage of their processors.
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| Lehrinhalte |
Different views on computers
Assembler
Structure and Functionality: Hardware, Software
Machine Code
Processor
Components of the Processor
Alternative Processors
Pipelining
Memory Organization
Evaluation of Computers
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| Beurteilungskriterien |
Klausur
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| Lehrmethoden |
Vorträge und Übungen
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| Abhaltungssprache |
Deutsch |
| Literatur |
Kursunterlagen
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| Lehrinhalte wechselnd? |
Nein |
| Sonstige Informationen |
www.jku.at/iic/cad/teaching
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| Äquivalenzen |
INBIPVOCAR1: VO Computer Architecture 1 (4,5 ECTS)
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| Frühere Varianten |
Decken ebenfalls die Anforderungen des Curriculums ab (von - bis)
INBIPVOCAR1: VO Computer Architecture 1 (2011W-2016S)
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| Präsenzlehrveranstaltung |
| Teilungsziffer |
- |
| Zuteilungsverfahren |
Direktzuteilung |
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