[ 289HWDEETIK20 ] KV Introduction to Digital System Design

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Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS B1 - Bachelor's programme 1. year (*)Informationselektronik Timm Ostermann 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Bachelor's programme Electronics and Information Technology 2020W
Objectives The lecture provides an overview of digital circuit design.
  • Number system, KV diagram, minimization
  • Gate and Flipflops
  • Timing
  • FSM
  • Digital design/ASIC-Design
  • Memory
Criteria for evaluation written and/or oral exam
Methods Slide presentation; joint discussion of examples
Language German
Study material Will be announced in the lecture
Changing subject? No
Corresponding lecture (*)MEBWAVOTINF: VO Technische Informatik (3 ECTS)
On-site course
Maximum number of participants 35
Assignment procedure Assignment according to sequence