Inhalt

[ 921CGELDICP13 ] PR Design of Integrated Circuits

Versionsauswahl
(*) Unfortunately this information is not available in english.
Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M - Master's programme Computer Science Dieter Ehrenstorfer 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Computer Science 2018W
Objectives Students will learn the hardware description language VHDL and they should be able to realise simple hardware designs for FPGA-based systems afterwards. Furthermore they should be able to verify digital circuits by the means of simulation and to synthesise a design for a target FPGA technology at the end of this lecture.
In the course exercises will be used to apply the theoretical knowledge to practical problems that will be assembled to a more complex application in small incremental steps. A key focus is set onto the practical work and the tailoring of a complex problem to solvable subsets.
Subject The lecture provides theoretical input combined with practical work and application of the theory. The following topics will be held:
* Syntax of VHDL in general

  • Simulation cycle and related features
  • Special data types and type conversions for direct arithmetic operations
  • Special descriptive approaches to generate VHDL-code for synthesis
  • Creation of effective test-benches
  • Comparison between VHDL description and generated hardware
  • Integration of FPGA-based RAM primitives into the design
  • Extraction of design parameters (possible clock frequency, etc.)
  • Dividing of complex tasks into small and testable subsets
Criteria for evaluation Marking is based on consecutive homework and a final project
Methods Blendend-learning approach with in-class theoretical inputs combined with online-resources.

Students are given assignments that have to be handed in electronically. A final project has to be presented in class at the end of the lecture
Language (*)English
Study material Electronic course material is made available for download via JKU moodle. There additional information and other references are available.
Changing subject? No
Corresponding lecture (*)INMAWPREINS: PR Entwurf integrierter Schaltungen (3 ECTS)
On-site course
Maximum number of participants 15
Assignment procedure Direct assignment