[ 289ELTRTELU20 ] UE Introduction in Integrated Circuit Design

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Workload Education level Study areas Responsible person Hours per week Coordinating university
1,5 ECTS B2 - Bachelor's programme 2. year (*)Informationselektronik Timm Ostermann 1 hpw Johannes Kepler University Linz
Detailed information
Original study plan Bachelor's programme Electronics and Information Technology 2020W
Objectives Support lecture
  • Introduction SPICE
  • DC, small and large signal model
  • Diode and MOSFET
  • Source follower, differential amplifier
  • Mismatch and charge injection
  • SC-Design
Criteria for evaluation homework and exam
Language German
Changing subject? No
Further information none
Corresponding lecture (*)MEBPDUETEEL: UE Technische Elektronik (1,25 ECTS)
On-site course
Maximum number of participants 35
Assignment procedure Assignment according to sequence