[ 489WSSIADSP22 ] PR Signal Processing Architectures

Workload Education level Study areas Responsible person Hours per week Coordinating university
4,5 ECTS M1 - Master's programme 1. year (*)Informationselektronik Michael Lunglmayr 3 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology (ELIT) 2023W
Objectives Students know and understand important signal processing algorithms. They are proficient in doing an efficient VHDL design for implementing these algorithms in digital hardware, especially using fixed point arithmetic.
  • Review of basic digital signal processing algorithms
  • DSP arithmetic
  • DSP hardware: DSPs, FPGAs and ASICs
  • CORDIC-algorithm: theory, architectures and applications
  • Fixed point effects in digital filtering
  • Low cost digital filters
  • Multirate signal processing
  • Sigma-delta modulation and oversampling ADCs
  • Numerically controlled oscillators
Criteria for evaluation Functionality of the individual tasks and ongoing collaboration
Methods Implementation DSP algorithms on FPGAs, project work supervised by lecturer
Language German
Study material
  • Lecture Slides
  • P. Pirsch, Architekturen der digitalen Signalverarbeitung, B.G. Teubner Stuttgart, 1996.
  • U. Meyer-Baese, Digital Signal Processing with Field Programmable Gate Arrays, Springer Verlag, Berlin Heidelberg, 2007
Changing subject? No
Further information Language can be switched to English if requested
Earlier variants They also cover the requirements of the curriculum (from - to)
489WSIVADSP14: PR Signal Processing Architectures (2014W-2022S)
On-site course
Maximum number of participants 15
Assignment procedure Assignment according to sequence