Students understand the system design process using C++ and Virtual Prototypes. The state-of-the-art C++ class library SystemC builds the basis and the students apply their knowledge to a RISC-V Virtual Prototype. Based on integrated hands-on exercises, the students are enabled to understand, enhance, and design their own Virtual Prototype.
Subject
Modern System Design with C++/SystemC
Modeling of Hardware
Ports, Interfaces and Channels
Instruction Set Simulators
Transaction Level Modeling (TLM)
Virtual Prototypes (VPs) for Hardware/Software Systems
Simulation with SystemC
Verification Methods
VP Use Cases (early software development, reference models)
