Inhalt

[ 489WSESMSTV22 ] VL Modelling, simulation and test of integrated circuits

Versionsauswahl
(*) Unfortunately this information is not available in english.
Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M2 - Master's programme 2. year (*)Informationselektronik Timm Ostermann 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology 2021W
Criteria for evaluation
Changing subject? No
Corresponding lecture (*)489WSATTISV16: VO Test Integrierter Schaltungen (3 ECTS) oder 489WSATMSSV16: VO Modellierung und Simulation von elektronischen Schaltungen (3 ECTS)
On-site course
Maximum number of participants -
Assignment procedure Assignment according to sequence