[ 521HARDRARCV16 ] VL Computer Architecture
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| Es ist eine neuere Version 2025W dieser LV im Curriculum Bachelor's programme Electronics and Information Technology 2025W vorhanden. |
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| Workload |
Education level |
Study areas |
Responsible person |
Hours per week |
Coordinating university |
| 4,5 ECTS |
B2 - Bachelor's programme 2. year |
Computer Science |
Daniel Große |
3 hpw |
Johannes Kepler University Linz |
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| Detailed information |
| Original study plan |
Bachelor's programme Computer Science 2021W |
| Objectives |
Students understand how software is described in a fashion that can be realized in terms of logic circuits. They are enabled to realize corresponding components in a hardware description language. They are able to run simple software/assembly code on their own implementation of a processor. They are able to optimize their processor through sequential control units, pipelining, co-processors, etc. They are able to evaluate the performances of the resulting processors. The are enabled to improve the memory usage of their processors.
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| Subject |
- Different views on computers
- Assembler
- Structure and Functionality: Hardware, Software
- Machine Code
- Processor
- Components of the Processor
- Alternative Processors
- Pipelining
- Memory Organization
- Evaluation of Computers
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| Criteria for evaluation |
Written Examination
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| Methods |
Talks and Exercises
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| Language |
German |
| Study material |
Courseware
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| Changing subject? |
No |
| Further information |
www.ics.jku.at/teaching/
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| Earlier variants |
They also cover the requirements of the curriculum (from - to)
INBIPVOCAR1: VO Computer Architecture 1 (2011W-2016S)
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| On-site course |
| Maximum number of participants |
- |
| Assignment procedure |
Direct assignment |
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