Inhalt

[ 489ELTEEKSV17 ] VL Design of complex integrated circuits

Versionsauswahl
Es ist eine neuere Version 2019W dieser LV im Curriculum Master's programme Electronics and Information Technology 2019W vorhanden.
Workload Education level Study areas Responsible person Hours per week Coordinating university
3 ECTS M1 - Master's programme 1. year (*)Informationselektronik Timm Ostermann 2 hpw Johannes Kepler University Linz
Detailed information
Original study plan Master's programme Electronics and Information Technology 2017W
Criteria for evaluation
Changing subject? No
On-site course
Maximum number of participants -
Assignment procedure Direct assignment